최신 EN0-001 무료덤프 - ARM Accredited engineer
In which type of storage will the compiler preferentially place frequently accessed variables?
정답: A
What type of debug point would you set when debugging flash memory or ROM?
정답: B
In an MPCore system, when one core is waiting for resources to be released, what instruction could be used to reduce that core's power consumption?
정답: A
When debugging an embedded Linux system, which one of the following techniques can be used to halt a single user thread, while allowing other threads to continue to run during the debug process?
정답: C
A 32KB 4-way set associative instruction cache supports a cache line size of 64 bytes. How many bits are required to index a cache line in a way?
정답: D
A re-entrant interrupt handler would typically be used to:
정답: A
In the Generic Interrupt Controller (GIC) architecture, which of the following ID numbers are reserved for interrupts that are private to a CPU interface?
정답: A
In a system using the Security Extensions, how does the Secure Monitor execute a switch from Secure to Non-secure state?
정답: C
Consider a sequence of five independent instructions running on a pipelined processor. There are no interlocks and no data dependencies between instructions, and each instruction takes one cycle to execute. The processor has three pipeline stages and is not superscalar.
How many cycles does it take to fetch, decode and execute all five instructions in sequence, assuming that there are no pipeline stalls?
How many cycles does it take to fetch, decode and execute all five instructions in sequence, assuming that there are no pipeline stalls?
정답: D
An embedded application running on an ARM processor is not meeting its expected performance target. The target hardware on which the application is running allows the frequency of the CPU to be increased independently from the memory system.
The CPU frequency is increased from 800 MHz to 1 GHz and experiments verify that the application performance does not increase.
Which one of the following statements MUST BE TRUE?
The CPU frequency is increased from 800 MHz to 1 GHz and experiments verify that the application performance does not increase.
Which one of the following statements MUST BE TRUE?
정답: C
A Programmer's View CPU model usually provides:
정답: A
A deeply embedded real-time industrial control system is missing some hard real-time interrupt deadlines. Which of the following performance analysis techniques is the most suitable for identifying which routines are causing the problem?
정답: A
When the processor is executing in Thumb state, which of the following statements is correct about the values stored in R15?
정답: A
When using the Performance Monitoring Unit to count runtime events the counter registers are limited to 32-bits. How can more than 2A32 events be counted without significantly impacting the software performance?
정답: D
Which events would be counted using the Performance Monitoring Unit (PMU) in order to measure the data cache efficiency of an application?
정답: A
What are the values of the NZCV bits in the CPSR after executing the following instructions?
LDR R0, = 0xFFFFFFFF
ADDS R0, R0, #1
LDR R0, = 0xFFFFFFFF
ADDS R0, R0, #1
정답: C
Which of the following memory attributes, specified in a translation table entry, could be used to protect a page containing a read-sensitive peripheral from speculative instruction fetches?
정답: A
In a Cortex-A9 processor, CP14 system control registers are used for:
정답: A
In an operating system environment, most applications are executed in which processor mode?
정답: C
In an ARMv7-A processor, which control register is used to enable the Memory Management Unit (MMU)?
정답: C